Wafer-level testing and test during burn-in for integrated circuits
Wedi'i Gadw mewn:
| Prif Awdur: | |
|---|---|
| Awdur Corfforaethol: | |
| Awduron Eraill: | |
| Fformat: | Electronig eLyfr |
| Iaith: | Saesneg |
| Cyhoeddwyd: |
Boston :
Artech House,
2010.
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| Cyfres: | Artech House integrated microsystems series.
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| Pynciau: | |
| Mynediad Ar-lein: | An electronic book accessible through the World Wide Web; click to view |
| Tagiau: |
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
|
Byddwch y cyntaf i adael sylw!