APA (7. basım) Alıntı
Bahukudumbi, S., & Chakrabarty, K. (2010). Wafer-level testing and test during burn-in for integrated circuits. Artech House.
Chicago Style (17. basım) Atıf
Bahukudumbi, Sudarshan, ve Krishnendu Chakrabarty. Wafer-level Testing and Test During Burn-in for Integrated Circuits. Boston: Artech House, 2010.
MLA (9th ed.) Atıf
Bahukudumbi, Sudarshan, ve Krishnendu Chakrabarty. Wafer-level Testing and Test During Burn-in for Integrated Circuits. Artech House, 2010.
Uyarı: Bu alıntı herzaman %100 doğru olmayabilir..