Wafer-level testing and test during burn-in for integrated circuits
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| 主要作者: | |
|---|---|
| 企業作者: | |
| 其他作者: | |
| 格式: | 電子 電子書 |
| 語言: | 英语 |
| 出版: |
Boston :
Artech House,
2010.
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| 叢編: | Artech House integrated microsystems series.
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| 主題: | |
| 在線閱讀: | An electronic book accessible through the World Wide Web; click to view |
| 標簽: |
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| 020 | |z 9781596939899 | ||
| 020 | |z 1596939893 | ||
| 035 | |a (CaPaEBR)ebr10412729 | ||
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| 082 | 0 | 4 | |a 621.38132 |2 22 |
| 100 | 1 | |a Bahukudumbi, Sudarshan. | |
| 245 | 1 | 0 | |a Wafer-level testing and test during burn-in for integrated circuits |h [electronic resource] / |c Sudarshan Bahukudumbi, Krishnendu Chakrabarty. |
| 260 | |a Boston : |b Artech House, |c 2010. | ||
| 300 | |a xv, 198 p. : |b ill. | ||
| 490 | 1 | |a Artech House integrated microsystems series | |
| 504 | |a Includes bibliographical references and index. | ||
| 533 | |a Electronic reproduction. |b Palo Alto, Calif. : |c ebrary, |d 2011. |n Available via World Wide Web. |n Access may be limited to ebrary affiliated libraries. | ||
| 650 | 0 | |a Integrated circuits |x Testing. | |
| 650 | 0 | |a Integrated circuits |x Wafer-scale integration. | |
| 650 | 0 | |a Semiconductors |x Testing. | |
| 655 | 7 | |a Electronic books. |2 local | |
| 700 | 1 | |a Chakrabarty, Krishnendu. | |
| 710 | 2 | |a ebrary, Inc. | |
| 830 | 0 | |a Artech House integrated microsystems series. | |
| 856 | 4 | 0 | |u http://site.ebrary.com/lib/daystar/Doc?id=10412729 |z An electronic book accessible through the World Wide Web; click to view |
| 908 | |a 170314 | ||
| 942 | 0 | 0 | |c EB |
| 999 | |c 114350 |d 114350 | ||