Verification by error modeling using testing techniques in hardware verification /
I tiakina i:
| Kaituhi matua: | |
|---|---|
| Kaituhi rangatōpū: | |
| Ētahi atu kaituhi: | |
| Hōputu: | Tāhiko īPukapuka |
| Reo: | Ingarihi |
| I whakaputaina: |
Boston :
Kluwer Academic Publishers,
2003.
|
| Rangatū: | Frontiers in electronic testing ;
25. |
| Ngā marau: | |
| Urunga tuihono: | An electronic book accessible through the World Wide Web; click to view |
| Ngā Tūtohu: |
Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!
|
| Whakaahuatanga ōkiko: | xiv, 216 p. : ill. |
|---|---|
| Rārangi puna kōrero: | Includes bibliographical references and index. |