Digital System Test and Testable Design Using HDL Models and Architectures /
Furkejuvvon:
| Váldodahkki: | |
|---|---|
| Searvvušdahkki: | |
| Materiálatiipa: | Elektrovnnalaš E-girji |
| Giella: | eaŋgalasgiella |
| Almmustuhtton: |
Boston, MA :
Springer US,
2011.
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| Fáttát: | |
| Liŋkkat: | http://dx.doi.org/10.1007/978-1-4419-7548-5 |
| Fáddágilkorat: |
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Geahča maid: Digital System Test and Testable Design
- Demystifying chipmaking
- Formal methods in circuit design /
- Compact models for integrated circuit design : conventional transistors and beyond /
- Mathematical foundations for linear circuits and systems in engineering /
- Comprehensive functional verification the complete industry cycle
- Nonlinear transistor model parameter extraction techniques