Computer architecture
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| Main Author: | |
|---|---|
| Corporate Author: | |
| Other Authors: | |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
London : Hoboken, N.J. :
ISTE ; Wiley,
2013.
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| Series: | Computer engineering series
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| Subjects: | |
| Online Access: | An electronic book accessible through the World Wide Web; click to view |
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| 008 | 121016s2013 enka sb 001 0 eng d | ||
| 010 | |z 2012951898 | ||
| 020 | |z 9781848214293 | ||
| 020 | |z 9781118577790 (e-book) | ||
| 035 | |a (CaPaEBR)ebr10653849 | ||
| 035 | |a (OCoLC)826685380 | ||
| 040 | |a CaPaEBR |c CaPaEBR | ||
| 050 | 1 | 4 | |a QA76.9.A73 |b B53 2013eb |
| 100 | 1 | |a Blanchet, Gerard. | |
| 245 | 1 | 0 | |a Computer architecture |h [electronic resource] / |c Gérard Blanchet, Bertrand Dupouy. |
| 260 | |a London : |b ISTE ; |a Hoboken, N.J. : |b Wiley, |c 2013. | ||
| 300 | |a xiv, 364 p. : |b ill. | ||
| 490 | 0 | |a Computer engineering series | |
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a pt. 1. Elements of a basic architecture -- pt. 2. Programming model and operation -- pt. 3. Memory hierarchy -- pt. 4. Parallelism and performance enhancement -- pt. 5. Appendices. | |
| 533 | |a Electronic reproduction. |b Palo Alto, Calif. : |c ebrary, |d 2015. |n Available via World Wide Web. |n Access may be limited to ebrary affiliated libraries. | ||
| 650 | 0 | |a Computer architecture. | |
| 655 | 7 | |a Electronic books. |2 local | |
| 700 | 1 | |a Dupouy, Bertrand. | |
| 710 | 2 | |a ebrary, Inc. | |
| 856 | 4 | 0 | |u http://site.ebrary.com/lib/daystar/Doc?id=10653849 |z An electronic book accessible through the World Wide Web; click to view |
| 908 | |a 170314 | ||
| 942 | 0 | 0 | |c EB |
| 999 | |c 151947 |d 151947 | ||