Metamodeling-driven IP reuse for SoC integration and microprocessor design
I tiakina i:
| Kaituhi matua: | |
|---|---|
| Kaituhi rangatōpū: | |
| Ētahi atu kaituhi: | |
| Hōputu: | Tāhiko īPukapuka |
| Reo: | Ingarihi |
| I whakaputaina: |
Boston ; London :
Artech House,
c2009.
|
| Ngā marau: | |
| Urunga tuihono: | An electronic book accessible through the World Wide Web; click to view |
| Ngā Tūtohu: |
Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!
|
Ngā tūemi rite: Metamodeling-driven IP reuse for SoC integration and microprocessor design
- Metamodeling-driven IP reuse for SoC integration and microprocessor design
- Designing SOCs with configured cores unleashing the Tensilica Xtensa and diamond cores /
- Designing SOCs with configured cores unleashing the Tensilica Xtensa and diamond cores /
- Designing embedded systems with PIC microcontrollers principles and applications /
- Designing embedded systems with PIC microcontrollers principles and applications /
- Designing embedded systems with PIC microcontrollers principles and applications /