Design methodology for RF CMOS phase lock loops
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| 主要作者: | |
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| 企業作者: | |
| 其他作者: | , |
| 格式: | 電子 電子書 |
| 語言: | 英语 |
| 出版: |
Boston ; London :
Artech House,
c2009.
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| 叢編: | Artech House microwave library.
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| 主題: | |
| 在線閱讀: | An electronic book accessible through the World Wide Web; click to view |
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| 008 | 090117s2009 maua sb 001 0 eng d | ||
| 020 | |z 1596933836 (cased) | ||
| 020 | |z 9781596933835 (cased) | ||
| 035 | |a (CaPaEBR)ebr10312962 | ||
| 035 | |a (OCoLC)503447788 | ||
| 040 | |a CaPaEBR |c CaPaEBR | ||
| 050 | 1 | 4 | |a TK7872.P38 |b Q44 2009eb |
| 100 | 1 | |a Quemada, Carlos. | |
| 245 | 1 | 0 | |a Design methodology for RF CMOS phase lock loops |h [electronic resource] / |c Carlos Quemada, Guillermo Bistué, Iñigo Adin. |
| 260 | |a Boston ; |a London : |b Artech House, |c c2009. | ||
| 300 | |a xii, 226 p. : |b ill. | ||
| 490 | 1 | |a Artech House microwave library | |
| 504 | |a Includes bibliographical references and index. | ||
| 533 | |a Electronic reproduction. |b Palo Alto, Calif. : |c ebrary, |d 2011. |n Available via World Wide Web. |n Access may be limited to ebrary affiliated libraries. | ||
| 650 | 0 | |a Metal oxide semiconductors, Complementary |x Design and construction. | |
| 650 | 0 | |a Phase-locked loops |x Design and construction. | |
| 655 | 7 | |a Electronic books. |2 local | |
| 700 | 1 | |a Adin, IIñigoigo. | |
| 700 | 1 | |a Bistué, Guillermo. | |
| 710 | 2 | |a ebrary, Inc. | |
| 830 | 0 | |a Artech House microwave library. | |
| 856 | 4 | 0 | |u http://site.ebrary.com/lib/daystar/Doc?id=10312962 |z An electronic book accessible through the World Wide Web; click to view |
| 908 | |a 170314 | ||
| 942 | 0 | 0 | |c EB |
| 999 | |c 100343 |d 100343 | ||