FPGA prototyping by Verilog examples Xilinx Spartan -3 version /
I tiakina i:
Kaituhi matua: | Chu, Pong P., 1959- |
---|---|
Kaituhi rangatōpū: | ebrary, Inc |
Hōputu: | Tāhiko īPukapuka |
Reo: | Ingarihi |
I whakaputaina: |
Hoboken, N.J. :
J. Wiley & Sons,
c2008.
|
Ngā marau: | |
Urunga tuihono: | An electronic book accessible through the World Wide Web; click to view |
Ngā Tūtohu: |
Tāpirihia he Tūtohu
Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!
|
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Ngā tūemi rite
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FPGA prototyping by VHDL examples Xilinx Spartan-3 version /
mā: Chu, Pong P., 1959-
I whakaputaina: (2008) -
Embedded SoPC design with NIOS II processor and Verilog examples
mā: Chu, Pong P., 1959-
I whakaputaina: (2012) -
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mā: Zhu, Yu
I whakaputaina: (2010) -
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mā: Chu, Pong P., 1959-
I whakaputaina: (2011) -
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