Tohutoro APA (7th ed.)
Wang, L., Wu, C., & Wen, X. (2006). VLSI test principles and architectures: Design for testability. Elsevier Morgan Kaufmann Publishers.
Tohutoru Kātū Chicago (17th ed.)
Wang, Laung-Terng, Cheng-Wen Wu, me Xiaoqing Wen. VLSI Test Principles and Architectures: Design for Testability. Amsterdam ; Boston: Elsevier Morgan Kaufmann Publishers, 2006.
Tohutoro MLA (9th ed.)
Wang, Laung-Terng, et al. VLSI Test Principles and Architectures: Design for Testability. Elsevier Morgan Kaufmann Publishers, 2006.
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