System-on-chip test architectures nanometer design for testability /
Wedi'i Gadw mewn:
| Awdur Corfforaethol: | |
|---|---|
| Awduron Eraill: | , , |
| Fformat: | Electronig eLyfr |
| Iaith: | Saesneg |
| Cyhoeddwyd: |
Amsterdam ; Boston :
Morgan Kaufmann Publishers,
c2008.
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| Cyfres: | Morgan Kaufmann series in systems on silicon.
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| Pynciau: | |
| Mynediad Ar-lein: | An electronic book accessible through the World Wide Web; click to view |
| Tagiau: |
Ychwanegu Tag
Dim Tagiau, Byddwch y cyntaf i dagio'r cofnod hwn!
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