ebrary, Inc, Wang, L., Stroud, C. E., & Touba, N. A. (2008). System-on-chip test architectures: Nanometer design for testability. Morgan Kaufmann Publishers.
芝加哥风格引文ebrary, Inc, Laung-Terng Wang, Charles E. Stroud, 与 Nur A. Touba. System-on-chip Test Architectures: Nanometer Design for Testability. Amsterdam ; Boston: Morgan Kaufmann Publishers, 2008.
MLA引文ebrary, Inc, et al. System-on-chip Test Architectures: Nanometer Design for Testability. Morgan Kaufmann Publishers, 2008.
警告：这些引文格式不一定是100％准确.