Tohutoro APA (7th ed.)

ebrary, Inc, Wang, L., Stroud, C. E., & Touba, N. A. (2008). System-on-chip test architectures: Nanometer design for testability. Morgan Kaufmann Publishers.

Tohutoru Kātū Chicago (17th ed.)

ebrary, Inc, Laung-Terng Wang, Charles E. Stroud, me Nur A. Touba. System-on-chip Test Architectures: Nanometer Design for Testability. Amsterdam ; Boston: Morgan Kaufmann Publishers, 2008.

Tohutoro MLA (9th ed.)

ebrary, Inc, et al. System-on-chip Test Architectures: Nanometer Design for Testability. Morgan Kaufmann Publishers, 2008.