Cita APA (7th ed.)
Ferdjallah, M. (2011). Introduction to digital systems: Modeling, synthesis, and simulation using VHDL. Wiley.
Cita Chicago (17th ed.)
Ferdjallah, Mohammed. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL. Hoboken, N.J.: Wiley, 2011.
Cita MLA (9th ed.)
Ferdjallah, Mohammed. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL. Wiley, 2011.
Atenció: Aquestes cites poden no estar 100% correctes.