Rexistros de Citas
Cita APA
Ferdjallah, M. (2011). Introduction to digital systems: Modeling, synthesis, and simulation using VHDL. Wiley.
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Citación estilo Chicago
Ferdjallah, Mohammed. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL. Hoboken, N.J.: Wiley, 2011.
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Cita MLA
Ferdjallah, Mohammed. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL. Wiley, 2011.
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Warning: These citations may not always be 100% accurate.