APA-Zitierstil (7. Ausg.)
Bahukudumbi, S., & Chakrabarty, K. (2010). Wafer-level testing and test during burn-in for integrated circuits. Artech House.
Chicago-Zitierstil (17. Ausg.)
Bahukudumbi, Sudarshan, und Krishnendu Chakrabarty. Wafer-level Testing and Test During Burn-in for Integrated Circuits. Boston: Artech House, 2010.
MLA-Zitierstil (9. Ausg.)
Bahukudumbi, Sudarshan, und Krishnendu Chakrabarty. Wafer-level Testing and Test During Burn-in for Integrated Circuits. Artech House, 2010.
Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.