Design for embedded image processing on FPGAs
"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit...
I tiakina i:
| Kaituhi matua: | |
|---|---|
| Kaituhi rangatōpū: | |
| Hōputu: | Tāhiko īPukapuka |
| Reo: | Ingarihi |
| I whakaputaina: |
Singapore ; New York, N.Y. :
Wiley,
2011.
|
| Ngā marau: | |
| Urunga tuihono: | An electronic book accessible through the World Wide Web; click to view |
| Ngā Tūtohu: |
Tāpirihia he Tūtohu
Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!
|
| Whakarāpopototanga: | "Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"-- "The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation"-- |
|---|---|
| Whakaahuatanga ōkiko: | xvi, 482 p., [6] p. of plates : ill. (some col.) |
| Rārangi puna kōrero: | Includes bibliographical references and index. |