APA ציטוט
Bellido, M. J., Juan Chico, J., & Valencia, M. (2006). Logic-timing simulation and the degradation delay model. Imperial College Press.
Chicago Style (17th ed.) Citation
Bellido, Manuel J., Jorge Juan Chico, and Manuel Valencia. Logic-timing Simulation and the Degradation Delay Model. London: Imperial College Press, 2006.
ציטוט MLA
Bellido, Manuel J., et al. Logic-timing Simulation and the Degradation Delay Model. Imperial College Press, 2006.
אזהרה: ציטוטים אלה לעיתים לא מדויקים ב 100%.