APA-ийн эшлэл(7 дахь хэвлэлт)

Radecka, K., & Zilic, Z. (2003). Verification by error modeling: Using testing techniques in hardware verification. Kluwer Academic Publishers.

Чикаго-гийн эшлэл (17 дахь хэвлэлт)

Radecka, Katarzyna, ба Zeljko Zilic. Verification by Error Modeling: Using Testing Techniques in Hardware Verification. Boston: Kluwer Academic Publishers, 2003.

MLA -ийн эшлэл (9 дэх хэвлэлт)

Radecka, Katarzyna, ба Zeljko Zilic. Verification by Error Modeling: Using Testing Techniques in Hardware Verification. Kluwer Academic Publishers, 2003.